B.Sc. in Computer Science & Engineering
Rajshahi University of Engineering & Technology (RUET), Bangladesh
Final semester · Academic requirements expected by July 2026
3.88CGPA / 4.00
Final-semester CSE · IEEE-published research · RTL/FPGA systems
Shahriar
Rizvi
B.Sc. CSE candidate at RUET focused on computing systems research.
IEEE-published researcher working across RTL design, FPGA acceleration, computer architecture, quantum-inspired systems, AI, DSP, and reproducible computing-systems research.
01 — About
Computing systems from RTL to research
I am Shahriar Rizvi, a final-semester B.Sc. candidate in Computer Science & Engineering at Rajshahi University of Engineering & Technology (RUET), Bangladesh, with a CGPA of 3.88/4.00. My academic requirements are expected to be completed by July 2026.
My work spans IEEE-published research, FPGA acceleration, RTL/VLSI design, computer architecture, quantum-inspired systems, AI, operating systems, computer graphics, DSP, Wi-Fi sensing, and visible light positioning.
I also bring teaching and mentoring experience through competitive-programming instruction, peer-learning activities, and long-term academic mentoring for SSC, HSC, engineering-admission, and university-level learners.
02 — Education
Academic background
Higher Secondary Certificate (HSC), Science
Government Edward College, Pabna, Bangladesh
2020
5.00GPA / 5.00
Secondary School Certificate (SSC), Science
Pabna Zilla School, Pabna, Bangladesh
2018
5.00GPA / 5.00
03 — Research / Current Work
Research in accelerated systems
Current work bridges RTL design, FPGA prototyping, quantum-inspired acceleration, DSP-assisted localization, and reproducible experimental analysis.
FPGA-Based Quantum Neural Network Accelerator: A Quantum-Inspired VLSI Design Approach
Supervisor: Prof. Dr. Md. Nazrul Islam Mondal, Department of CSE, RUET.
Quantum-inspired accelerationRTL designFPGA prototypingFixed-point datapathsMicrocoded controlSimulation validationOpen-source EDA/VLSI evaluation
DSP-Assisted Hybrid Wi-Fi and Visible Light Positioning for Indoor Localization
Exploring low-cost indoor positioning by combining Wi-Fi signal behavior, visible light positioning, DSP-based feature processing, and reproducible experimental analysis.
Wi-Fi signal behaviorVisible light positioningDSP-based featuresIndoor localizationCommunication research
Computer ArchitectureFPGA AccelerationRTL/VLSIQuantum ComputingQuantum-Inspired Machine LearningDSPIndoor LocalizationAI / Explainable AIEmbedded SystemsComputer Networks
04 — Publications / Papers
IEEE-published research
FPGA Acceleration of Quantum Circuit Primitives: Fixed-Point Microcoded Design and CPU Comparison
Shahriar Rizvi; Md. Nazrul Islam Mondal
DOI: 10.1109/ICECTE69292.2026.11429464
Beyond Artifacts: Semantic Deepfake Detection and Digital Provenance Tracking with Multimodal Large Language Models
Jabunnesa Jahan Sara; Shahriar Rizvi; Tasfia Jannat Tasfi
DOI: 10.1109/ICCIT68739.2025.11490141
05 — Selected Projects
Verified technical work
SigmaCore RISC-V CPU Design
32-bit multicycle RISC-V CPU in SystemVerilog with modular ALU, control unit, register file, memory, instruction decoder, sign extender, and top-level testbench. Uses FSM-based control, smart-monitor traces, and waveform debugging with Icarus Verilog and GTKWave.
View project on GitHub →SigmaCore Operating System
Ongoing small operating-system project from scratch using low-level Assembly-focused boot components, connecting operating-system concepts with processor architecture and bare-metal system design.
View project on GitHub →Bezier Breakout: Curve Ball Arena
C++17 OpenGL/GLUT computer graphics game using primitives and procedural visuals, with paddle control, levels, camera/help controls, and sound fallback without an external game engine.
View project on GitHub →AI-Powered Attendance System
Python-based facial-recognition attendance system with GUI, model training, real-time camera recognition, CSV attendance import/export, and student attendance reporting.
View project on GitHub →BoiKothon — Book Review Sharing Platform
Django-based book-community web application with authentication, group creation/joining, post discussions, responsive design, and SQLite-backed development workflow.
View project on GitHub →06 — Achievements
Honours & recognition
Champion, VLSITHON 2024
RTL Section, ULKASEMI.
Quantum Excellence
IBM Qiskit Global Summer School 2025.
Government Technical Scholarship
Recipient for all 4 undergraduate years.
1st Prize and Funding Recipient
University Innovation Hub Program, 2025.
Bronze Honour
International Youth Math Challenge, 2024.
Champion
HULT Prize on Campus RUET, 2023.
Earlier Academic Distinctions
- Champion, National High School Programming Contest, 2016.
- Champion, Science Olympiad, 2018 and 2019.
- Champion, Creative Talent Hunt Regional, 2019.
- Bangladesh Math Olympiad Regional Runners Up, 2017 and 2019.
- 1st Runner-up, Science Fair 2020.
07 — Teaching / Experience / Leadership
Mentoring and leadership
Teaching / Mentoring
Competitive Programming Instructor / MentorRUET Analytical and Programming Lab · 1+ years
Mentored 100+ junior students in C/C++, algorithms, debugging, and contest-oriented problem solving.
Private Tutor / Academic Mentor5+ years
Mentored SSC, HSC, engineering admission test, and university-level students with an emphasis on conceptual understanding and structured problem solving.
Leadership / Management
Class Representative and CoordinatorDepartment of CSE, RUET · 2023–2025
Served as a regular communication bridge between faculty members and students.
Vice PresidentRUET Computing Society · 2025–Present
Supported computing culture, peer learning, student engagement, and technical-event coordination.
Campus AmbassadorULKASEMI Private LTD · 2025–2026
Promoted semiconductor, RTL, and VLSI career awareness through campus-level engagement.
Official AmbassadorInternational Computer Science Competition · 2025
Encouraged student participation in international computer science and problem-solving competitions.
Joint SecretaryPabna District Association, RUET · 2025–Present
Assisted in community coordination, student networking, event organization, and association communication.
08 — Skills
Technical toolkit
Programming
CC++PythonSQLJavaScript/Node.jsLaTeX
Hardware / RTL
VerilogSystemVerilogRTL designFinite-state machinesCPU datapathFPGA-oriented design
Systems / Graphics
Bare-metal programmingAssembly fundamentalsOperating-system conceptsOpenGL/GLUTComputer graphics
AI / ML
ClassificationFeature engineeringModel evaluationExplainable AI basicsComputer vision basics
Signal / Positioning
DSP fundamentalsSignal-feature analysisWi-Fi sensingVisible light positioningIndoor localization
Tools
GitGitHubLinux/UbuntuIcarus VerilogVerilatorGTKWaveVivadoJupyter/Colab
Web / Database
DjangoLaravelBackend fundamentalsSQL database designSQLiteMySQL
Networking
IP addressingSubnettingVLAN conceptsRIP/OSPF basicsCisco Packet Tracer
09 — Contact
Let’s connect
I am open to research collaboration, academic discussion, teaching/mentoring opportunities, and professional work in RTL, FPGA, computer architecture, AI, DSP, and computing systems.